Translate into assembly
u64 = 0;
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Last updated
4 years ago
Date created
Oct 20, 2020
Ch 4
(35 cards)
Translate into assembly
u64 = 0;
LDR R0,=0
STRD R0,R0,u64
Translate into assembly
s32 = s8;
LDRSB R0,s8
STR R0,s32
Translate into assembly
s8 = s16;
LDRSH R0,s16
STRB R0,s8
Translate into assembly
ps32++;
LDR R0,ps32
ADD R0,R0,4
STR R0,ps32
Translate into assembly
u32 = 0;
LDR R0,=0
STR R0,u32
*ps32 = 0;
LDR R0,=0
LDR R1,ps32
STR R0,[R1]
Translate into assembly
s32 = s16;
LDRSH R0,s16
STR R0,s32
Translate into assembly
s8 = s32;
LDR R0,s32
STRB R0,s8
Translate into assembly
ps8 = &s8;
ADR R0,s8
STR R0,ps8
*(ps8+1) = 0;
LDR R0,=0
LDR R1,ps8
STRB R0,[R1,1]
Translate into assembly
ps8++;
LDR R0,ps8
ADD R0,,R0,1
STR R0,ps8
Translate into assembly
int32_t f4(int32_t a32[])
{
return a32[1];
}
f4:
LDR R0,[R0,4]
BX LR
*(ps32+1) = 0;
LDR R0,=0
LDR R1,ps32
STR R0,[R1,4]
((int8_t*)&s32)[1] = 0;
LDR R0,=0
ADR R1,s32
STRB R0,[R1,1]
Translate into assembly
u32 = *pu16 + 2;
LDR R0,pu16
LDRH R1,[R0]
ADD R1,R1,2
STR R1,u32
Translate into assembly
s64 = s32;
LDR R0,s32
ASR R1,R0,31
STRD R0,R1,s64
Translate into assembly
u8 = u32;
LDR R0,u32
STRB R0,u8
Translate into assembly
u32 = u16;
LDRH R0,u16
STR R0,u32
Translate into assembly
s8 = -1;
LDR R0,=-1
STRB R0,s8
Translate into assembly
u16 = 0;
LDR R0,=0
STRH R0,u16
Translate into assembly
u16 = u32;
LDR R0,u32
STRH R0,u16
Translate into assembly
u32 = u8;
LDRB R0,u8
STR R0,u32
Translate into assembly
s16 = s8;
LDRSB R0,s8
STRH R0,s16
Translate into assembly
s32 = -1;
LDR R0,=-1
STR R0,s32
Translate into assembly
s64 = -1;
LDR R0,=-1
STRD R0,R0,s64
Translate into assembly
pu8 = &u8;
ADR R0,u8
STR R0,pu8
*(ps32+s32) = 0;
LDR R0,=0
LDR R1,ps32
LDR R2,s32
STR R0,[R1,R2,LSL 2]
Translate into assembly
s16 = -1;
LDR R0,=-1
STRH R0,s16
Translate into assembly
s16 = s32;
LDR R0,s32
STRH R0,s16
Translate into assembly
u32 = *(pu16 + 2);
LDR R0,pu16
LDRH R1,[R0,4]
STR R1,u32
Translate into assembly
u16 = u8;
LDRB R0,u8
STRH R0,u16
Translate into assembly
u64 = u32;
LDR R0,u32
LDR R1,=0
STRD R0,R1,u64
Translate into assembly
u8 = u16;
LDRH R0,u16
STRB R0,u8
Translate into assembly
ps32 = &s32;
ADR R0,s32
STR R0,ps32
Translate to assembly
u8 = 0;
LDR R0,=0
STRB R0,u8
Ch 3
(19 cards)
Translate into assembly
uint64_t f1(uint32_t a)
{
uint32_t f2(uint32_t);
return (uint64_t)f2(a+10);
}
f1: PUSH {LR}
ADD R0,R0,10 //R0 <— a+10
BL f2 //R0 <— f2(a+10)
LDR R1,=0
POP {PC}
Translate into assembly. Assume function and b is int64_t
b = g4();
BL g4
STRD R0,R1,b
Translate into assembly. Assume its on int8_t
h2(&a);
ADR R0,a
BL h2
Translate into assembly
uint64_t f4(uint32_t u32)
{
return (uint64_t)u32;
}
f4:
LDR R1,=0
BX f4
Translate into assembly. Assume it’s on int8_t
b = h4();
BL h4
STRB R0,b
Translate into assembly. Assume b is int32_t
b = f4();
BL f4
STR R0,b
Translate into assembly
int32_t f9(int32_t a)
{
int8_t f10(int8_t);
return a + (int32_t) f10(0);
}
f9:
PUSH {LR,R4}
MOV R4,R0
LDR R0,=0
BL f10
ADD R0,R0,R4
POP {R4,PC}
Translate into assembly. Assume a,b is uint64_t.
g3(a,b);
LDRD R0,R1,a
LDRD R2,R3,b
BL g3
Translate into assembly
uint32_t f7(uint32_t a, uint32_t b)
{
uint32_t f8(uint32_t,uint32_t);
return f8(b,a);
}
f7:
PUSH {LR}
MOV R2,R0
MOV R0,R1
MOV R1,R2
BL f8
POP {PC}
g2(&a);
ADR R0,a
BL g2
g1(a);
LDRD R0,R1,a
BL g1
Translate into assembly. Assume a,b is int32_t
f3(a,b);
LDR R0,a
LDR R1,b
BL f3
Translate into assembly
uint64_t f11(int32_t a)
{
uint32_t f12(uint32_t);
return (uint64_t)f12(a+10);
}
PUSH {LR}
ADD R0,R0,=10
BL f12
LDR R1,=0
POP {PC}
Translate into assembly. Assume a is int32_t
f1(a);
LDR R0,a
BL f1
Translate into assembly. Assume it’s on int8_t
h1(a);
LDRSB R0,a
BL h1
Translate into assembly. Assume it’s on int8_t
h3(a,b);
LDRSB R0,a
LDRSB R1,b
BL h3
Translate into assembly
int32_t f1(int32_t a)
{
int8_t f2(int8_t);
return a + (int32_t)f2(0);
}
f1: PUSH {R4,LR}
MOV R4,R0 //Moving from one register to another; preserving a
LDR R0,=0 //Preparing parameter for f2
BL f2 //R0 <—- f2(0)
ADD R0,R0,R4 //R0 = f2(0) + a
POP {R4,PC}
Translate into assembly
int32_t f5(int32_t a, int32_t b)
{
int32_t f6(int32_t);
return f6(a) + f6(b);
}
f5:
PUSH {R4,R5,LR}
MOV R4,R1
BL f6
MOV R5,R0
MOV R0,R4
BL f6
ADD R0,R0,R5
POP{R4,R5,PC}
Translate into assembly. Assume a is int32_t
f2(&a);
ADR R0,a
BL f2
Ch 5
(8 cards)
Translate into assembly
int64_t a,b;
a = a + b;
LDRD R0,R1,a
LDRD R2,R3,b
ADDS R0,R0,R2
ADCS R1,R1,R3
STRD R0,R1,a
Translate into assembly
uint32_t a,b,c;
c = a * b;
LDR R0,a
LDR R1,b
MUL R0,R0,R1
STR R0,c
int32_t Discriminant(int32_t a,int32_t b, int32_t c)
{
return b*b - 4*a*c;
}
Discriminant;
MUL R1,R1
LSL R0,R0,2
MLS R0,R0,R2,R1
BX LR
Translate into assembly
int64_t a;
a -= 5;
LDRD R0,R1,a
SUBS R0,R0,5
SBC R1,R1,0
STRD R0,R1,a
int32_t a,b,c;
c = a / b;
LDR R0,a
LDR R1,b
SDIV R0,R0,R1
STR R0,c
Translate into assembly
int32_t a,b,c;
c=a*b;
LDR R0,a
LDR R1,b
MUL R0,R0,R1
STR R0,c
uint32_t a,b,c ;
c = a / b ;
LDR R0,a
LDR R1,b
UDIV R0,R0,R1
STR R0,c
int32_t a,b,c;
c = a % b;
LDR R0,a
LDR R1,b
SDIV R2,R0,R1
MLS R0,R2,R1,R0
STR R0,c