Section 1
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Mechanical Disk
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Last updated
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Date created
Mar 1, 2020
Cards (71)
Section 1
(50 cards)
Mechanical Disk
Slow. Operation order is important.
Device Drivers
Small programs that allow input/output devices to communicate with the computer.
file descriptor
integer number identifying a file connection
I/O
*O/S performs all I/O; forbids user. *Users ask the O/S for service. *See above.
First Generation
1940-1960 Relays or vacuum tubes.
Interrupt(different from trap)
hardware version of interrupt
Resource manager
distributes and enforces the distribution
Second Generation
mid 1960's-mid 1970's; Transistors One user program at a time.
I/O port space
allows for special IN and OUT instructions are available in kernel mode to allow drivers to read and write the registers.
DMA Chip
control the flow of bits between memory and some controller without constant CPU intervention.
Protection
*Hardware modes give the O/S secure control. *OS then implements other restrictions. -File permission. -Memory control
L1 Cache
Cache used by a CPU for short-term storage of data and instructions. It is the fastest and closest to the CPU.
Stack Pointer (SP)
points to the top of the current stack in memory
Memory Management Unit (MMU)
The run-time mapping from virtual to physical addresses (hardware device)
Pipelines
organization system for running multiple processes at once
Monolithic-Kernel
Entire OS working in Kernel space, high level interface, lots of software over hardware.
Fourth Generation
1980-present Gui's
Soft real-time systems
Provide no guarantee as to when a critical real-time process will be scheduled. They guarantee only that the process will be given preference over noncritical processes.
Memory Protection Hardware
OS can't do this when user code is running. Creates an interrupt on violations.
Busy Waiting
a method by which processes, waiting for an event to occur, continuously test to see if the condition has changed and remain in unproductive, resource consuming wait loops
Pipe
used to connect two processes
Multi-core
many processor 'cores' on a single chip
Program Counter (PC)
Register that holds the memory address of the next instruction to be executed.
Process Table
all the information about each process, other than the contents of its own address space, is stored in an operating system. Which is an array of structures, one for each process currently in existence.
*interrupts and traps *CPU Modes *Memory Protection *Clock interrupt
features needed by the Operating systems
Third Generation
1964-1970 Integrated circuits each program has own region of memory spooling/time sharing
two parts of an I/O device
A controller and the device itself
Fifth Generation
present mobile computing limited power
Context Switch
requires performing a state save of the current process and a state restore of a different process. save the CPU registers and replace them with saved copies from another running program.
how to concatenate in a shell
cat then put the file names separated by a space
three ways the driver can be placed into the kernel
*re-link the kernel with the new driver and then reboot the system. * make an entry in an operating system file telling it that it needs the driver and then reboot the system. At boot time, the operating system goes and finds the drivers it needs and loads them. *accept new drivers while running and install them on the fly without the need to reboot.
Polling
process where the computer or controlling device waits for an external device to check for its readiness or state, often with low-level hardware.
Solid State Storage
Order doesn't matter. Writes wear the device, and must be distributed.
device driver
software that talks to a controller, giving it commands and accepting responses,
Program Status Register
Multi-threaded processor.
execute multiple processes or threads concurrently, supported by the operating system. CPU can switch between them without copying to memory. Multiple register sets
Hard real-time systems
Real-time system where a critical process must be serviced before a deadline.
CPU Modes Hardware
User and supervisor (or kernel) mode. Some instructions allowed only in supervisor mode(I/O instructions, for instance). switch to user before executing user code
Address Space
list of memory locations from 0 to some maximum, which the process can read and write
nonvolatile memory
Storage that retains data even when powered down (such as flash memory, hard disk, or DVD storage).
L2 Cache
Cache used by a CPU for short-term storage of data. It is used second after L1 cache and is slower than L1.
SATA
A type of ATA interface that uses serial data transfer rather than the parallel data transfers used in older forms of ATA. See also parallel ATA (PATA).
cache hit
When the CPU finds the stored data in the cache
batch processing system
Networking Protocols
define a common format and set of rules for exchanging messages between devices.
Traps(different from interrupt)
software version of interrupt
Extended Machine
Adds function to the machine.
Micro-Kernel
Structures the op system by removing all nonessential components from the kernel and implementing them as system and user level programs
Interrupt
start the device and ask it to give an interrupt when it is finished. At that point the driver returns. The operating system then blocks the caller if need be and looks for other work to do. When the controller detects the end of the transfer,
memory hierarchy in top down order
Register Cache Main Memory Magnetic Disk
Section 2
(21 cards)