Section 1
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Cards (168)
Section 1
(50 cards)
a
U05 - Q.0026 Any changes make to registers or memory must be undone before the interrupt happens. Which interrupt types is deal with? Precise Imprecise Trap None of the others
c
U05 - Q.0014 Which of the following statements is not correct about DMA? DMA controller has access to the system bus independent of the CPU DMA helps reduce the number of interrupts (in comparison with interrupt-driven I/O) DMA controller is usually faster than CPU The operating system can only use DMA if the hardware has a DMA controller
a
U05 - Q061 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 9. How many cylinder do Total head movement using SSF algorithms? 47 69 45 None of the others
d
U05 - Q.007 Typical duties of a clock driver Handling alarm system call made by user processes Providing watchdog timers for parts of the system itself Accounting for CPU usage All of others
a
Which of the following actions generates an external interrupt? An input/output operation is completed. A page that does not exist in the main memory is accessed by the virtual storage management. A system call instruction is executed. Division by zero occurs.
b
The following algorithm can be described as ______ (1) Set list data structure to all requested cylinder (2) Set the current to the current cylinder that is just served (3) Do while list != NULL nextCylinder = min(list, current) Set current = nextCylinder remove(list, nextCylinder) End Do FCFS SSF/ SSTF elevator slight modified elevator
a
U05 - Q060 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 38. Which the ordering cylinder in progress do using a slight modification of elevator algorithms? 38 38 40 2 6 10 20 22 38 40 2 6 10 20 22 38 38 38 22 20 10 6 2 40 38 38 40 22 20 10 6 2
a
U05 - Q.0032 The I/O devices have no way of seeing memory addresses as they go by on the memory bus, so they have no way of responding to them. Which the type mapping with memory has above disadvantage ? Memory-Mapped I/O Memory-Mapped I/O Data Buffer Memory-Mapped Files Memory-Mapped Cache
b
A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 18. The ordering cylinder in progress using SSF algorithms is 10, 22, 20, 2, 40, 6, 38 18, 20, 22, 10, 6, 2, 38, 40 None of others 18, 10, 6, 2, 20, 22, 38, 40
b
A disk queue with requests for I/O blocks on cylinders in orders: 12, 23, 0, 143, 56, 20, 189, 84, 11, 33. The drive is currently serving a request at cylinder 143. What is the total distance that disk arm moves to satisfy all the pending requests using SSF algorithms? Suppose that the disk drive has 200 cylinder (numbered 0 to 199) 130 141 356 800
a
A disk queue with requests for I/O blocks on cylinders in orders: 12, 23, 0, 143, 56, 20, 189, 84, 11, 33. The drive is currently serving a request at cylinder 143. What is the ordering cylinder in progress using a slight modification of elevator algorithms? 143, 143, 189, 0, 11, 12, 20, 23, 33, 56, 84 12, 23, 0, 143, 56, 20, 189, 84, 11, 33 143, 143, 84, 56, 33, 23, 20, 12, 11, 0, 189 143, 143, 12, 11, 20, 23, 0, 33, 56, 84, 189
a
U05 - Q.0027 The CPU uses polling to watch the control bit, constantly looping to see whether the device is ready. Which I/O software type is deal with? Programmed Interrupt-Driven DMA Asynchronous
c
U05 - Q.0039 A disk queue with requests for I/O blocks on cylinders in orders: 10 171 47 126 4 124 23 8 76. Assume that the disk head is initially at cylinder 50. How many Averages seek length of cylinder do the head movement using elevator algorithms on DOWNWARD ? 92.222 55.111 23.667 18.222
a,b
U05 - Q.006 Programmable clocks typically have several modes of operation one-shot mode square-wave mode root-mode All of others
a,b,c
U05 - Q.0025 Which of these statements about disadvantages of DMA are true? Caching a device control register would be disastrous The I/O devices have no way of seeing memory addresses as they go by on the memory bus, so they have no way of responding to them The need of figuring out at boot time which memory addresses are not really memory addresses None of the others
a
U05 - Q.0012 The I/O technique where the processor busy waits for an I/O operation to complete is called: Programmed I/O Interrupt-driven I/O Direct Memory Access (DMA) None of the others
a,c
U05 - Q.009 The X Window System include X Server X Software X client X Hardware
c
U05 - Q.0038 A disk queue with requests for I/O blocks on cylinders in orders: 10 171 47 126 4 124 23 8 76. Assume that the disk head is initially at cylinder 50. The ordering cylinder in progress using SSF algorithms ? 50 47 10 8 4 23 76 124 126 171 50 10 171 47 126 4 124 23 8 76 50 47 23 10 8 4 76 124 126 171 50 76 124 126 171 4 8 10 23 47
a
A disk queue with requests for I/O blocks on cylinders in orders: 12, 23, 0, 140, 56, 20, 189, 84, 11, 33. The drive is currently serving a request at cylinder 143. What is the average seek length that disk arm moves to satisfy all the pending requests using FCFS algorithms? 79.4 35.6 33.2 18.6
d
U05 - Q.010 The average red, green, and blue values of each grid square are then sampled and saved as the value of one ______ bitmaps mickey point None of others
a
U05 - Q.0021 Which layer of four I/O software layers do "Computing the track, sector, and head for a disk read"? Device driver Device independent software Interrupt handler User level software
b
Which of the following is not correct about the reliability of different RAID levels? There is no reliability support in RAID level 0 All RAID levels can survive one disk crash In RAID level 2, a single bit error in a word can be detected AND corrected In RAID levels 3, 4, 5 a single bit error in a word can be detected
a
U05 - Q.0028 A disk queue with requests for I/O blocks on cylinders in orders: 200 171 47 126 4 124 23 500 76. Assume that the disk head is initially at cylinder 50. The ordering cylinder in progress using SSF algorithms? 50 47 23 4 76 124 126 171 200 500 50 200 171 47 126 4 124 23 500 76 50 76 124 126 171 200 500 4 23 27 50 76 124 126 171 200 500 27 23 4
a
What is described ? 1. PC is saved in a known place 2. All instructions before the one pointed to by the PC have fully executed 3. No instruction beyond the one pointed to by the PC has been executed 4. Execution state of the instruction pointed to by the PC is known Precise Imprecise Trap None of the others
a
U05 - Q.0033 DMA is a solution that solves ________ CPU read the disk block from the controller's buffer a byte or a word at a time by executing a loop, and Waste the CPU's time CPU read the disk block from the controller's buffer a byte or a word at a time by executing a loop, and Accessing to the system bus independent of the CPU accessing to the system bus independent of the CPU, and waste the CPU's time waste the CPU's time, and Regulating transfers to multiple devices, often concurrently
a
U05 - Q.0040 The virtual single disk is divided up into strips of k sectors each to store data in distributing as Strip 0: sectors 0 to k - 1, Strip 1: sectors k to 2k - 1, and Strip n: sectors nk to (n+1)k - 1. What is referenced ? Striping Disk partition THINC Thin Client
b
A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 38. Assume that the disk head is initially at cylinder 18. How many cylinder do Total head movement using SSF algorithms? 144 62 60 54
a
U05 - Q.0034 How many registers have the DMA controller ? At least 3 Only 3 1 Addresses register, 1 Hold register, one or more control register 1 Hold register, 1 count register, one or more register
a,b,d
U05 - Q.008 The message using on mouse software usually occupies 3 bytes containing the change in x position since the last message the status of button absolute position the change in y position since the last message
a,b
U05 - Q.0030 Strip the client machine of all it smarts and software and just use it as a display, with all the computing done on the server side. Which definition is described? THINC Thin clients Client - Server X - Client
a,c
U05 - Q.004 Which of these statements about the advantages of clocks are true? Maintain the time of day and prevent one process from monopolizing the CPU, among other things The clock software take the form of a software driver Are essential to the operation of any multiprogrammed system All of others
a
U05 - Q.003 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 18. The ordering cylinder in progress using a slight modification of elevator algorithms 18, 20, 22, 38, 40, 2, 6, 10 18, 20, 22, 38, 40, 10, 6, 2 18, 10, 6, 2, 20, 22, 38, 40 None of others
a,c,d
U05 - Q.0023 Which function of the control registers of DMA can do? Specify the I/O port to use Store the counter value Specify the number of bytes to transfer in one burst Specify the transfer unit
a,b
U05 - Q.0040 - M The virtual single disk is divided up into strips of k sectors each to store data in distributing as Strip 0: sectors 0 to k - 1, Strip 1: sectors k to 2k - 1, and Strip n: sectors nk to (n+1)k - 1. What is referenced ? Striping RAID strategy THINC Thin Client
a
U05 - Q.002 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 18 and the head move upward. The ordering cylinder in progress using elevator algorithms is 20, 22, 38, 40, 10, 6, 2 10, 22, 20, 2, 40, 6, 38 18, 10, 6, 2, 20, 22, 38, 40 None of others
a,b
U05 - Q.0022 1. Each control register is assigned an I/O port number, an 8/16 bit integer 2. The set of all the I/O ports form the I/O port space and is protected 3. Address spaces for memory and I/O are different Which the type mapping with memory can corresponded with 3 description? Memory-Mapped I/O Memory-Mapped I/O Data Buffer Memory-Mapped Files Memory-Mapped Cache
d
Which is the right order between the 4 I/O software layers? User-level I/O software, Device drivers, Interrupt handlers, Device-independent OS software User-level I/O software, Interrupt handlers, Device drivers, Device-independent OS software Device-independent OS software, user-level I/O software, Device drivers, Interrupt handlers User-level I/O software, Device-independent OS software, Device drivers, Interrupt handlers
a,c
U05 - Q.0034 - M How many registers have the DMA controller ? At least 3 Only 3 1 Addresses register, 1 count register, one or more control register 1 Hold register, 1 count register, one or more register
b
U05 - Q065 An interrupt that does not meet the following requirements is called an ________ - The PC is saved in a known place - All instruction bef0re the one pointed to by the PC have fully executed - No instruction beyond the one pointed to by the PC has been executed - The execution state of the instruction pointed to by the PC is known Precise interrupt Imprecise interrupt Required interrupt Disappointed interrupt
c
U05 - Q063 Which mechanism is described as "the device controller sneaks in and steals an occasional bus cycle from the CPU once in a while, delaying it slightly" ? Interrupt stealing Cycle sneaking Cycle stealing All of the others
a
U05 - Q.0037 Goals of the I/O software are _________ Solving the Sharing and dedicated devices Multiple naming Device dependence Device drivers
a,b
U05 - Q.0033 - M DMA is a solution that solves ________ CPU read the disk block from the controller's buffer a byte or a word at a time by executing a loop Waste the CPU's time Accessing to the system bus independent of the CPU Regulating transfers to multiple devices, often concurrently
b
U05 - Q.0035 DMA tells the device to acquire the bus, issue a series of transfer, then release the bus Which mode is described in DMA ? Word-at-a-time Block mode Fly-by mode All of the others
a,b,c
U05 - Q.0037 - M Goals of the I/O software are _________ Solving the Sharing and dedicated devices Uniform naming Device independence Device drivers
d
Which is the difference between personal computers and mainframe computers? Personal computers are always interactive Mainframe computers are mostly batch systems with many users Protection is much more important on mainframe computers All of the others
c
A disk queue with requests for I/O blocks on cylinders in orders: 200 171 47 126 4 124 23 500 76. Assume that the disk head is initially at cylinder 50. How many cylinder do Total head movement using slight elevator algorithms? (Assume the moving from the maximum cylinder to minimum cylinder equals 0 cylinder) 1626 542 493 None of the others
b
U05 - Q.0031 Which layer of four I/O software layers do "Checking to see if the user is permitted to use the device" ? Device driver Device independent software Interrupt handler User level software
a
U05 - Q064 To handle the interrupt, the controller puts a number on the address lines specifying which device wants attention and asserts a signal to interrupt the CPU. The number on the address lines is used as an index into a table to fetch a new program counter. What is the table's name? Interrupt vector Interrupt table Address table Address lines table
b
U05 - Q061 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 9. How many cylinder do Total head movement using SSF algorithms? 47 69 45 None of the others
a
U05 - Q.0024 1. · The CPU sets the DMA controller registers so DMA knows what to transfer where, and how many transfer · The CPU command the disk controller read data from disk to internal buffer, then verify the checksum 2. · The disk controller sends an acknowledgement signal to DMA controller when the write is complete · Simultaneously, the DMA controller decides which device to service next (using RR or priority scheme) · In each transfer, the DMA controller increments the memory addresses to use and decrements the byte count · If the byte count is still greater than 0, step 2 through 4 are repeated until the count reaches 0 · If the byte equals 0, the DMA controller interrupts the CPU to let it know the transfer is now complete 3. · The disk controller transfer a word/ byte from internal buffers to main memory at the address that is described in the DMA's memory address register 4. · The DMA controller initiates the transfer by issuing a read request over the bus to the disk controller Arrange all description to describe the DMA work in order 1, 4, 3, 2 1, 2, 3, 4 4, 3, 2, 1 4, 2, 3, 1
Section 2
(50 cards)
e
U05 - Q075 Which of the following statements about interrupts and trap instructions is incorrect? An interrupt is a hardware-generated change of control flow within the system An interrupt handler deals with the cause of the interrupt A trap instruction is a software-generated interrupt A trap instruction can be used to call the OS services None of the others.
a
U05 - Q078 The aspect of disk performance that represents the time it takes to position the head a the desired track is known as Seek time Rotational delay Access time None of the others.
b
U05 - Q076 Which of the following is not correct about the reliability of different RAID levels? There is no reliability support in RAID level 0 All RAID levels can survive one disk crash In RAID level 2, a single bit error in a word can be detected AND corrected In RAID levels 3, 4, 5 a single bit error in a word can be detected
a
Resources assigned Resources requested E = (3, 14, 12, 12) Choose the correct statement in progress of process using the banker's algorithm P1, P3, P4, P5, P2 P1, P2, P3, P4, P5 P1, P3, P4, P5 None of others
a
U05 - Q080 Which mechanism is described as "the device controller sneaks in and steals an occasional bus cycle from the CPU once in a while, delaying it slightly"? Interrupt stealing Cycle sneaking Cycle stealing All of the others
c
U05-Q057 Which of the following statements about device drivers is incorrect? A device driver is a set of device-specific code for controlling the I/O device attached to a computer Most operating systems expect device drivers to be part of the kernel In the I/O software architecture, the device drivers layer lie right above the hardward, and below the interrupt handlers layer None of the other choices
d
U05-Q054 DMA operations require the following information from the processor Address of I/O device Starting memory location to read from and write to Number of words to be read or written All of the other choices
b
U05-Q053 Which of the following is not correct about the reliability of different RAID levels? There is no reliability support in RAID level 0 All RAID levels can survive one disk crash In RAID level 2, a single bit error in a word can be detected AND corrected In RAID levels 3, 4, 5 a single bit error in a word can be detected
a
U05-Q092 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 50, 6, 38. Assume that the disk head is initially at cylinder 38. How many average seek length does Shortest Seek First use? 8.57 60 12 87
a
E = (8, 16, 15, 16) Which process can runnable in order using deadlock detection algorithms? P4, P1, P2, P3, P5 P1, P2, P3, P4, P5 P4, P5, P1, P2, P3 P3, P2, P5, P4, P1
c
U05 - Q074 Which of the following statements is not correct about "device independence" ? Files and devices are accessed in the same way, independent of their physical nature A system has to maintain only one set of system calls for both writing on a file and writing on the console Device independence requires all programmers to deal with different devices directly Device independent interfaces should be given to programmers
b
U06 - Q.0020 Take the true statement in deadlock prevention 1. Mutual exclusion: Take a resource away 2. Hold and wait: Request all resources initially 3. Circular wait: Order resources numerically 4. No preemption: Spool everything 1, 2, 3, 4 2, 3 only 2 None of the others
a
U05-Q087 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 38. Which the ordering cylinder in progress do using an elevator algorithms? Assume that the disk's arm moves to DOWN direction 38 38 22 20 10 6 2 40 38 38 40 22 20 10 6 2 38 40 38 22 20 10 6 2 None of the others
a
U05 - Q083 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 36, 6, 38. Assume that the disk head is initially at cylinder 9. How many cylinder do Total head movement using SSF algorithms? 45 67 43 None of the others
U05 - Q079 Which statement about DMA is incorrect? The controller does not need to wait for the CPU to transfer data to/from memory The CPU can start a DMA block transfer, and in the mean time do other work The CPU needs not to be concerned with the time it takes to transfer data It is always true that DMA is less expensive than CPU-mediate data transfers
a
U05-Q085 What does the "Uniform Interfacing for Device Drivers" concept mean in the IO Software Layer? All drivers have the same interfaces All drivers have the same user graphic interfaces All drivers have the same plugin pin All of the others
a
U05-Q049 An example of a block-oriented I/O device is _______ CD ROM Printer Modem All of the other choices
c
U05-Q089 Where does the "Handling alarm system call made by user processes" function of clock software use? Message passing system Client - Server All of the others
a,b,c
E = (8, 10, 12, 14) Choose the correct statement using the banker's algorithm Only P4 runnable P1, P2, P3, P5 deadlock The resource assigned is unsafe All process deadlocks
d
U05 - Q081 DMA operations require the following information from the processor Address of I/O device Starting memory location to read from and write to Number of words to be read or written All of the others.
c
U05-Q051 Each device attached to your computer comes with a special program called a __________ that facilitates the communication between the device and the OS. device configurator translator device driver communication utility
a
E = (10, 5, 7) Choose the correct statement in progress of process using the banker's algorithm P2, P4, P5, P1, P3 P2, P4, P5, P1 P1, P2, P3, P4, P5 None of the others
a
U05-Q091 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 50 and the max cylinder of this disk as 50. How many cylinder do Total head movement using a slight modification of elevator algorithms? 40 86 38 None of the others
a
U05-Q088 Which solution is applied to the bitmap information make easier to move bitmaps between dissimilar devices? The DIB (Device Independent Bitmap) files The True Type files No solution None of the others
b
U06 - Q.0011 A possibility of deadlock can occur: If a system is in safe state If a system is in unsafe state If a system is in instable state None of the others
a
U05-Q090 Which data type does the mouse software communication with Operating System? Message Micky None of the others
a
U05-Q086 A disk queue with requests for I/O blocks on cylinders in orders: 10, 22, 20, 2, 40, 6, 38. Assume that the disk head is initially at cylinder 9 and the maximum cylinder of this disk is 50. How many cylinder do Total head movement using a slight modification of elevator algorithms? 47 35 73 69
a
U05 - Q066 What's different between asynchronous and synchronous transfer in principles of I/O software? The CPU starts the transfer and goes off to do something else until the interrupt arrives The CPU starts the transfer and goes off to do something else until the data are available in the buffer None of the others
a
U06 - Q.0014 The system is said to be in an unsafe state if The operating system cannot guarantee that all current processes can complete their work The system is deadlocked A process is indefinitely postponed None of the others
a
U05-Q084 Why does the controller need an internal buffer? Ensuring that the errors do not occur before transferring Saving money in low-end computers Increase the administration data in transfer when the bus were busy All of the others
U05 - Q069 What is a "tripping" in RAID? Distributing data over multiple drives Take away possessions from someone Get undressed All of the others
a
U05-Q052 Which of the following is an advantage of Memory-mapped I/O? Since the control registers of devices are mapped into the memory space, device drivers can be written without using Assembly language Using memory-mapped I/O, caching a device control register is not acceptable Since there is only one address space, all I/O devices must examine all memory references to see which ones to response to None of the other choices
d
U05 - Q077 Programmed I/O should be acceptable for which of the following systems? Interactive systems Multiprogramming systems Embedded systems None of the others.
a
U05 - Q068 Which concept is described as "disk sectors are just numbered consecutively starting at 0, without regard to the disk geometry"? Logical block addressing Physical block addressing Virtual block addressing None of the others
a
U06 - Q.0021 Which of these statements about the advantages of preemptable resources are true? Preemptable resources can be resolved deadlocks by reallocating resources from one process to another Is resources that cannot taken away from its current owner without causing the computation to fail Deadlocks involve preemptable resources All of the others
c
U05-Q055 In general, which is the best technique for I/O Data transfer? Programmed I/O Interrupt-Driven I/O Direct Memory Access None of the other choices
b
U05-Q056 What kind of I/O devices that disks and tapes belong to? Stream-oriented devices Block-oriented devices Character-oriented devices None of the other choices
a
U05-Q093 Which causes do seek errors occur? Mechanical problems in the arm Bad sector Backup errors None of the others
d
U05-Q050 Which of the following statements about interrupts and system calls is incorrect? System calls are caused by internal (synchronous) events Interrupts are asynchronous Interrupts are caused by external events None of the other choices
a,b,c
U06 - Q.0022 Strategies for dealing with deadlocks Detection and recovery Dynamic avoidance by careful resource allocation Prevention, by structurally negating one of the four required conditions None of the others
a,b
U06 - Q.0017 Which of these statements about the advantages of resource graph are true? Help carrying out the requests and releases step by step, and after every step check the graph to see if it contains any cycles to check deadlock or not Can generalized to handle either single resource or multiple resource If graph contains a cycle → no deadlock None of the others
c
U05 - Q067 Rearrange the layers in I/O software starting at the bottom 1. User-level I/O software 2. Device drivers 3. Interrupt handlers 4. Hardware 5. Device-independent operating system software 12345 54321 43251 15234
a
U06 - Q.0012 If in a resource-allocation graph, each resource type has exactly one instance, which of the following indicates a deadlock situation? The graph has at least one cycle. The graph has no cycle. The graph is connected. The graph is not connected.
a
U06 - Q.0018 The ability to take a resource away from a process, have another process use it, and then give it back without the process noticing it is highly dependent on the nature of the resource recovery through Preemption recovery through Rollback recovery through Killing Processes None of the others
a
U06 - Q.0019 Basic fact in safe and unsafe states To avoidance deadlocks → ensure that a system will never enter an unsafe state If a system is in safe state → possibility of deadlock If a system is in unsafe state → no deadlocks All of the others
a
Resources assigned Resources requested E = (10, 5, 7) Choose the correct statement in progress of process using the banker's algorithm P2, P4, P5, P1, P3 P2, P4, P5, P1 P1, P2, P3, P4, P5 None of others
d
U05 - Q082 Which of the following I/O software device layers is done by user-level software? Computing the track, sector, and head for a disk read Writing commands to the device registers Checking to see if the user is permitted to use the device Converting binary integers to ASCII for printing
d
U05-Q048 An example of the key differences that can exist across (and even in) classes of I/O devices is: Data rate Data representation Error conditions All of the other choices
c
U06 - Q.0013 The simplest way to break a deadlock is to preempt a resource Rollback kills one of the processes locks one of the processes
d
E = (3, 14, 12, 12) & A = (1, 5, 2, 0) Choose the correct statement in progress of process using the deadlock detection algorithm P1, P3, P4, P5, P2 P1, P2, P3, P4, P5 P1, P3, P4, P5 None of the others
Section 3
(50 cards)
a,b
U06 - Q.0038 - M 1. First phase, the process tries to lock all records it needs, one at a time 2. If it succeeds, it begins the second phase, performing its updates and releasing the locks Which system is applied above strategy ? Database system The system can apply the two phase locking All of application system All application can be deadlock
a
U06 - Q.0032 The main rule of the recovery through Killing process The process victim should be chosen only if it can be rerun from the beginning with no ill effects When a deadlock is detected, a process is reset to an earlier Killing random process None of the others
b
U06 - Q075 Which of the following statements does not apply to manual deadlock management? Deadlock is relatively infrequent for some system resources OS designers are normally very sensitive to deadlock when designing resource managers Recovery may involves rebooting the system None of the others.
a
U06 - Q.0040 Totally unacceptable and must prevent deadlocks at all costs. Whose ideas is referenced ? Mathematicians Engineers OS All of the others
a
U06 - Q.007 Which of these statements about the advantages of preemptable resources are true? Preemptable resources can be resolved deadlocks by reallocating resources from one process to another Is resources that cannot taken away from its current owner without causing the computation to fail Deadlocks involve preemptable resources None of others
d
U06 - Q075 Which of the following statements does not apply to manual deadlock management? Deadlock is relatively infrequent for some system resources OS designers are normally very sensitive to deadlock when designing resource managers Recovery may involves rebooting the system None of the others.
a
U06 - Q.004 ____ refer the objects as hardware devices, data records, files, etc .. that must be granted, acquired, used and released resources data information devices
a,d
U06 - Q.0036 - M Communication deadlocks can be resolved with ___________ Handling alarm system call made by user processes Soft Timers Busy waiting One of six functions of clock software
a
U06 - Q.0033 The process table slots are finite resource. When the table is full, the _______ occurs due to wait a random time and try again to enter the process table Live lock Dead lock Two phase lock None of the others
b
What is the smallest value of x for which this is a safe state? 0 1 2 3
a
U06 - Q.0030 Deadlook can occur in__________in which two or more process communicate by sending message. Communication system Real-time system Batch system All of the others
d
U06 - Q082 Dijkstra's Banker's Algorithm require the system to maintain the resource information for each process, including : A count of the system's total resources The maximum resources that can be requested by the process The number of resources currently acquired by the process The maximum resources that can be requested by the process and The number of resources currently acquired by the process
a
U06 - Q.010 A resource that is owned by a deadlocked process resource deadlocks communication deadlocks system deadlocks network deadlocks
a
U06 - Q067 What is the correct approach with requesting the dedicated devices to solve deadlock using Ostrich algorithm? The device driver decides blocking and returning an error code The device driver kills those requesting processes The device driver stops the current jobs and releases the devices All of the others
d
U06 - Q.0037 Communication deadlock can occur in ___________ in which two or more process communicate by sending message Communication system Message passing system Client - Server All of the others
a,b
U06 - Q.0026 1. A requests R 2. C requests T 3. A requests S 4. C requests R 5. A releases R 6. A releases S 7. B requests S 8. C requests S 9. B requests R The system is deadlock The system can be resolved by process B attacks the No-Preemption condition The system is in safe state The system is deadlock at the step 8
a
U06 - Q.008 The sequence of events required to use resource Request the resource, Use the resource, Release the resource Release the resource, Request the resource, Use the resource Use the resource, Request the resource, Release the resource Use the resource, Release the resource, Request the resource
b
U06-Q049 Each of the following characteristics applies to deadlock avoidance except ______ Relying on ability to predict effect of satisfying allocation requests Widely used in modern operating systems Inherently conservative strategy None of the other choices
d
U06 - Q.0036 Communication deadlocks can be resolved with ___________ None of the others Soft Timers Busy waiting One of six functions of clock software
c
U06 - Q.010 A resource that is owned by a deadlocked process resource deadlocks communication deadlocks system deadlocks network deadlocks
a,b
U06 - Q.0040 Totally unacceptable and must prevent deadlocks at all costs. Whose ideas is referenced ? Mathematicians Engineers OS All of the others
a
U06 - Q.006 ______ is resources that can be taken away from the process owning it with no ill effects preemptable nonpreemptable priority deadlocks
a
U06 - Q.010 A resource that is owned by a deadlocked process resource deadlocks communication deadlocks system deadlocks network deadlocks
a,b
U06 - Q.0031 - M The graphs have two kinds of nodes Processes that are shown as circles Resources that are shown as squares Resources that are shown as circles Processes that are shown as squares
b
U06 - Q083 A possibility of deadlock can occur: If a system is in safe state If a system is in unsafe state If a system is in instable state None of the others
a,d
U06 - Q.0029 The technique is used to prevent the communication deadlock Timeout just ignore recovery Acknowledgement signal
a,d
E = (8, 11, 12, 14) Choose the correct statement using the banker's algorithm P4, P5, P1, P2, P3 P1, P2, P3 deadlock The resource assigned is safe All process deadlocks
a
U06 - Q078 The system is said to be in an unsafe state if The operating system cannot guarantee that all current processes can complete their work The system is deadlocked A process is indefinitely postponed None of the others.
c
U06 - Q074 Which strategy is used in the Banker's algorithm for dealing with deadlocks? Deadlock ignorance Deadlock detection Deadlock avoidance Deadlock prevention
d
Resources assigned Resources still requested E = (3, 14, 12, 12) Choose the correct statement in progress of process using the deadlock detection algorithm P1, P3, P4, P5, P2 P1, P2, P3, P4, P5 P1, P3, P4, P5 None of others
a
U06 - Q.0038 Which system is applied above strategy ? 1. First phase, the process tries to lock all records it needs, one at a time 2. If it succeeds, it begins the second phase, performing its updates and releasing the locks Database system All of the others All of application system All application can be deadlock
a
U06 - Q.0027 The important ideal of deadlock avoidance is _______ Carefully resource allocation Just ignore problem Preventing deadlocks at all costs Willing pay a large penalty in performance
c
U06 - Q079 What is the correct approach with the Mutual Exclusion condition to prevent Deadlock? Order resources numerically Request all resources initially Spool everything Take resources away
a,b,c
U06 - Q.0037 - M Communication deadlock can occur in ___________ in which two or more process communicate by sending message Communication system Message passing system Client - Server None of others
d
U06 - Q077 Consider the following state of a system with four processes, P1, P2, P3 and P4, and five types of resources RS1, RS2, RS3, RS4 and RS5 . Process Allocated Request ------------------------------------------------------------------------------------------------------------------------------- P1 01112 11021 E = (24144) P2 01010 01021 A = (01021) P3 00001 02031 P4 21000 02110 Deadlocked processes are : P1, P2 P1, P3 P2, P3 P1, P4
a
U06 - Q.009 A set of processes is ____ if each process in the set is waiting for an event that only another process in the set deadlocked shared made priority powerful
a
U06 - Q063 One of way to prevent a deadlock is ________ Spool everything Rollback Kills one of the processes Locks one of the processes
a
E = (8, 12, 15, 16) Which process can runnable in order using deadlock detection algorithms ? None of the others P1, P2, P3, P4, P5 P4, P5, P1, P2, P3 P3, P2, P5, P4, P1
b
U06 - Q081 What is the correct approach with the Hold and Wait condition to prevent Deadlock? Order resources numerically Request all resources initially Spool everything Take resources away
a,b
U06 - Q.0028 Attacking the Mutual Exclusion Condition Avoiding assigning a resource when that is not absolutely necessary Try to make sure that as few processes as possible may actually claim the resource Must guarantee that whenever a process requests a resource, it does not hold any other resources All of the others
b
What do the processes progress in sequence? ABCDE ADCEB ADECB ACDEB
c
U06 - Q080 Typical approaches to handle deadlocks do not include Prevention Detection Deterrence Avoidance
a
U06 - Q062 In a directed graphs model, a possible of deadlock can occur: If graph contains a cycle and only one instance per resource type If graph contains a cycle and several instances per resource type If graph contains no cycle None of the others
a,d
U06 - Q.0025 1. A requests R 2. C requests T 3. A requests S 4. C requests R 5. A releases R 6. A releases S 7. B requests S The system is in safe state The system is in unsafe state The deadlock occurs at 7 All process no deadlock
a
U06 - Q.0031 The graphs have two kinds of nodes Processes that are shown as circles, and Resources that are shown as squares Resources that are shown as circles, and Processes that are shown as diamond Resources that are shown as circles, and Processes that are shown as squares Processes that are shown as circles, and Resources that are shown as triangles
a
U06 - Q064 The live lock is resolved by __________ Restricting all users to one process, one open file, and one everything. Killing the process itself. None of the others
d
U06 - Q068 Which method is used to prevent the communication deadlock? Handling alarm Acknowledge signal Timeouts All of the others
d
U06-Q048 Which deadlock condition does ordering resources numerically attack? Mutual exclusion Hold and wait No preemption None of the other choices
a
= (8, 11, 12, 14) Choose the correct statement using the banker's algorithm P4, P5, P1, P2, P3 P1, P2, P3 deadlock The resource assigned is unsafe All process deadlocks
a
U06 - Q.0039 First Approach of Attacking the Circular Wait Condition A process is entitled only to a single resource at the moment. If it needs a second one, it must release the first one Process can request resources whenever they want to, but all requests must be made in numerical order If a process that is holding some resources requests another resource that cannot be immediately allocated to it, then all resources currently being held are released All of the others
Section 4
(18 cards)